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Why does coherent detection introduce pre-FEC bit errors?

February 19, 2016

Why does coherent detection introduce pre-FEC bit errors?

  • The DSP algorithm at the receive end detects and analyzes the phase and amplitude of a received signal in real time to calculate and compensate the distortion of the signal caused by factors such as CD, PMD, and nonlinearity. Because CD, PMD, and nonlinearity vary with time, the compensation amount calculated by the DSP algorithm is not so accurate and thus pre-FEC bit errors occur.
  • In practice, the transmission distance should be extended as long as possible. The nonlinearity in a long-haul system cause large changes in signal phases. The DSP algorithm is thus required to lock the phase of each signal at a large tracking step, which enables fast locking of great phase changes but has poorer compensation accuracy. As a result, background noise is introduced and further bit errors occur (error floor poorer than 1.0E-6). The background noise is the major factor that causes pre-FEC bit errors in back-to-back OSNR measurement and short-reach transmission. It is negligible compared with the noise introduced in long-haul transmission. Therefore, the large-step tracking method remarkably improves long-haul transmission performance without affecting short-reach transmission performance.
  •  The DSP algorithm is independent of optical-layer configurations, such as back-to-back configurations, the transmission distance, and the number of spans. Therefore, in a back-to-back configuration, the DSP algorithm also has a compensation error and introduces bit errors.

 

Important Notes on BER for Coherent

  • For 100G coherent optical modules, the pre-FEC BERs may differ when different 100G boards are connected in back-to-back manner or when WDM-side external loopbacks are performed because of differences in the optical modules. Similarly, after signals traverse spans with good OSNRs, the BERs of different 100G boards may also differ. However, the use of advanced DSP algorithm in the 100G boards ensure that all the 100G boards have the same FEC correction capability.
  • As shown in the figure below, the red and blue lines represent the test data of two different 100G boards. 

 

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