What actually is Timing Loop in Network?

Timing loop is that a NE traces to a timing signal whose source is the NE. Timing loop would deteriorate the timing signals of related network elements(NEs) and should be avoided as possible in the synchronization network. In the PDH environment, timing loop is avoided by synchronization network plan, such as the method of assigning a substratum level to each NE.But in the SDH environment where the complicated architectures such as ring are involved, timing loop can not be avoided only using the engineering plan. So synchronization statue messages(SSMs) is used to avoid timing loop and provide a quantity level to the traced timing signal.

Synchronization Statue Message(SSM) is defined in the S1 byte in the SOH of STM-N frame in the ITU-T G.707 referred to Table1.In PDH, the similar function is defined, for example, in the any bit of No.5~8 bits in the TS0 time slot of even frame in the 2Mb/s timing signal as SSM function. A detailed algorithm of SSM has not be defined by ITU-T, but the criteria of SSM can be simply described as follows.

To external timing or line timing, SDH Network Element(NE) generally selects the digital signal with the highest quality level indication(SSM) as the reference timing signal from several available digital signals(To several signals with the same quality level, select one of the highest preset priority), sets SSM=DNU on the output port of the SDH interface which is selected as reference timing signal; and other output timing signals trace the reference signal and its SSM.