If SDH is based on node and signal synchronization, why do fluctuations occur?Very general question for a Optics beginner.
The answer lies in the practical limitations of synchronization. SDH networks use high-quality clocks feeding network el- ements. However, we must consider the following:
A number of SDH islands use their own reference clocks, which may be nominally identical, but never exactly the same.
Cross services carried by two or more operators always generate offset and clock fluctuations whenever a common reference clock is not used.
Inside an SDH network, different types of breakdown may occur and cause a temporary loss of synchronization. When a node switches over to a secondary clock reference, it may be different from the original, and it could even be the internal clock of the node.
Timing loop is that a NE traces to a timing signal whose source is the NE. Timing loop would deteriorate the timing signals of related network elements(NEs) and should be avoided as possible in the synchronization network. In the PDH environment, timing loop is avoided by synchronization network plan, such as the method of assigning a substratum level to each NE.But in the SDH environment where the complicated architectures such as ring are involved, timing loop can not be avoided only using the engineering plan. So synchronization statue messages(SSMs) is used to avoid timing loop and provide a quantity level to the traced timing signal.
Synchronization Statue Message(SSM) is defined in the S1 byte in the SOH of STM-N frame in the ITU-T G.707 referred to Table1.In PDH, the similar function is defined, for example, in the any bit of No.5~8 bits in the TS0 time slot of even frame in the 2Mb/s timing signal as SSM function. A detailed algorithm of SSM has not be defined by ITU-T, but the criteria of SSM can be simply described as follows.
To external timing or line timing, SDH Network Element(NE) generally selects the digital signal with the highest quality level indication(SSM) as the reference timing signal from several available digital signals(To several signals with the same quality level, select one of the highest preset priority), sets SSM=DNU on the output port of the SDH interface which is selected as reference timing signal; and other output timing signals trace the reference signal and its SSM.
To pass timing, NE put the SSM from west STM-N signal into that of east STM-N signal, and put the SSM from east STM-N signal into that of west STM-N signal.
Regardless of the timing mode, if external reference timing signals and timing from line signals are both not qualified, the NE clock will enter holdover;
Sl bits b5-b8
SDH synchronization quality level description
0
Quality unknown(Existing Sync.Network)
10
G.81 l(QL-PRC)
100
G.812 transit(QL-SSUT)
1000
G.812 local(QL-SSUL)
1011
Synchronous Equipment Timing Source C QL-SEC )
1111
Don’t use for synchronization(DUS)
others
Reserved
The above example is used to explain the SSM function. Figure 1(a) is the normal situation; Figure 1(b) is the situation of a fiber cut without using SSM, now a timing loop emerges between the NE2 and NE3; Figure 1(c) the situation is same as Figure 1(b) but using SSM, the timing loop is avoided.
Counter-attack for Timing Loop
To avoid timing loop, the SSM function of S1 byte should be improved and DUS/DNU scheme can be considered as an option.
