NRZ - Non-Return to Zero

Traditional binary modulation format used for speeds up to 28 Gbps per lane. Each symbol represents one bit.

PAM4 - Pulse Amplitude Modulation 4-level

Advanced modulation using four amplitude levels per symbol, effectively doubling data rate. Each symbol represents 2 bits. Used in 50G and 100G per lane applications.

• 53.125 GBd PAM4 = 50 Gbps per lane (after encoding overhead)
• 106.25 GBd PAM4 = 100 Gbps per lane (after encoding overhead)

Encoding Standards

• 8B/10B: 8 bits encoded into 10 bits for DC balance
• 64B/66B: 64 bits encoded into 66 bits for higher efficiency
• 4B5B: 4 bits encoded into 5 bits

While Ethernet dominates most optical networking, InfiniBand remains important for high-performance computing and AI/ML clusters:

InfiniBand Data Rates

InfiniBand Naming:

• SDR: Single Data Rate
• DDR: Double Data Rate
• QDR: Quad Data Rate
• FDR: Fourteen Data Rate (14 Gbps signaling)
• EDR: Enhanced Data Rate
• HDR: High Data Rate
• NDR: Next Data Rate
• XDR: eXtreme Data Rate

Applications: High-performance computing, AI/ML training clusters, financial trading systems, scientific computing

Storage area network protocol with its own speed designations:

Applications: Enterprise storage networks, SAN infrastructure

QSFP+ Power Classes

Note: Power consumption varies by application. High-speed modules (QSFP-DD, OSFP) typically consume up to 12W for optical modules, with coherent ZR modules consuming more.

Full Form: Quad Small Form-factor Pluggable Double Density 1600 Gigabit per second

Description: The latest evolution in the QSFP-DD family, supporting 1.6 Tbps aggregate bandwidth. "1600" indicates the total data rate in Gbps. Eight electrical lanes each operating at 200 Gbps (using advanced PAM4 signaling at approximately 200 Gbaud).

Data Rates: 1.6 Tbps (8 x 200 Gbps PAM4)

Electrical Interface: 8 x 200 Gbps PAM4 lanes

Backward Compatibility: Fully backward compatible with QSFP-DD800, QSFP-DD, QSFP112, QSFP56, QSFP28, and legacy QSFP modules

Specification: QSFP-DD Hardware Specification Rev 7.1 (June 2024)

Applications: Next-generation data centers, AI/ML infrastructure, 1.6T Ethernet

Standards Support: Designed for IEEE 802.3dj (1.6T Ethernet, in development)

Key Features:

• Maintains current QSFP-DD port density
• Enhanced thermal management with riding heatsink
• Optimized for next-generation ASIC capacities (51.2T and beyond)
• Investment protection through backward compatibility

Description: 800G variant of OSFP form factor with enhanced power handling for high-performance applications.

Data Rates: 800 Gbps (8 x 100 Gbps PAM4)

Applications: High-power 800G coherent optics, advanced modulation schemes

Description: 1.6 Terabit variant of OSFP, designed for the highest power and thermal requirements.

Data Rates: 1.6 Tbps (8 x 200 Gbps PAM4)

Applications: Ultra-high-speed data center interconnect, AI cluster networking

Full Form: Octal Small Form-factor Pluggable Extended Depth

Description: "XD" indicates Extended Depth variant providing additional module volume for complex optical engines and higher power applications.

Variants: OSFP-XD800, OSFP-XD1600

Applications: Long-reach coherent optics requiring larger DSP and optical components

Description: Combines extended depth with reduced height for specific system designs.

Full Form: Linear Pluggable Optics

Description: Revolutionary approach that eliminates retiming DSP (Digital Signal Processor) from the optical module, relying instead on the capabilities of ASIC SerDes for signal equalization. "Linear" refers to the linear (non-retimed) signal path.

Key Characteristics:

• Power Reduction: Significant power savings (~50-60%) compared to retimed optics by removing DSP circuits
• Cost Optimization: Lower component count reduces manufacturing costs
• Performance Dependency: Relies on quality of entire link (ASIC SerDes, PCB traces, connectors, optics)
• Limited Reach: Typically optimized for intra-rack or short inter-rack connections (0.5m to 3m)
• Silicon Photonics: Benefits from linear characteristics of SiPhotonics components

Trade-offs:

• Reduced telemetry and diagnostic capabilities
• More challenging interoperability (requires careful system design)
• Port-to-port performance variation based on channel quality
• Limited or no FEC monitoring capabilities

Power Comparison @ 800G:

• Retimed optics: ~15-16W
• LPO optics: ~6-9W
• System power savings: ~700W demonstrated in 64-port switches

Form Factors: Available in OSFP and QSFP-DD variants (LPO-800G-DR8, LPO-800G-2DR4)

Applications: AI/ML clusters, high-density switching fabrics, GPU interconnects

MSA Status: LPO MSA formed with industry-wide participation

Full Form: Co-Packaged Optics

Description: Revolutionary architecture integrating optical engines directly onto the switch ASIC package, eliminating traditional pluggable modules for highest-density ports. "Co-Packaged" indicates optics and ASIC are integrated in a single package.

Key Characteristics:

• Integration Level: Optical components mounted directly on ASIC substrate or interposer
• Power Efficiency: Eliminates pluggable module overhead and SerDes power
• Density: Enables port counts not possible with pluggables
• System Demonstration: 22% total system power reduction achieved in 25.6T switch demonstrations

Architecture Options:

• Integrated Laser: Light source on package
• External Light Source (ELSFP): Separate external laser modules feeding optical engines

Challenges:

• Reduced serviceability (optics not field-replaceable)
• Complex thermal management
• Manufacturing complexity and yield
• Limited flexibility in port configuration

Target Applications: Spine switches, AI training clusters, hyperscale data centers

Industry Status: Demonstration phase, not yet in volume production

Description: Technology enabling optical components to be manufactured using standard semiconductor fabrication processes, enabling lower costs and higher integration.

Benefits for Future Transceivers:

• Enables LPO implementations with improved linearity
• Facilitates CPO integration
• Reduces manufacturing costs through CMOS-compatible processes
• Enables higher levels of integration (multiple functions per chip)

As transceiver power increases with data rates, advanced cooling becomes essential:

Riding Heat Sinks

Heat sinks that "ride" on top of modules, crucial feature of QSFP-DD design that enables:

• Superior thermal performance in high-density configurations
• Backward compatibility (different height modules use same heat sink)
• Optimized airflow in stacked configurations

Liquid Cooling

Direct liquid cooling for switches and networking equipment, becoming necessary for:

• AI/ML infrastructure with 800G and 1.6T ports
• High-power coherent optics (>15W per port)
• Dense switch fabrics (64+ ports of 800G in 2RU)

Immersion Cooling

Complete immersion of equipment in dielectric fluid for maximum thermal performance in extreme-density deployments.

Status: Published March 2024

Description: Formal standard defining 800 Gbps Ethernet using 100 Gbps per lane signaling (8 lanes)

Key PMDs:

• 800GBASE-DR8: 8 parallel lanes at 1310nm, 500m reach
• 800GBASE-SR8: 8 parallel lanes at 850nm on MMF
• 800GBASE-VR8/CR8: Copper variants

Significance: Enables broad interoperability for 800G ecosystem

Status: In development (originally targeted 2026, may slip)

Scope:

• Define Ethernet MAC parameters for 1.6 Tb/s
• Physical layer specifications using 200 Gb/s per lane signaling
• Also defines 200G/400G/800G using 200G lanes where applicable
• Covers both copper (CR) and single-mode fiber PMDs

Technology Base: 200 Gbps PAM4 per lane (8 lanes = 1.6T)

Form Factors: QSFP-DD1600, OSFP1600

Description: Defines electrical interface specifications for 100 Gb/s, 200 Gb/s, and 400 Gb/s based on 100 Gb/s signaling

Applications: Chip-to-module interfaces for 800G modules

Description: Physical layer specifications for 100 Gb/s, 200 Gb/s, and 400 Gb/s operation over optical fiber using 100 Gb/s signaling

Applications: 800G optical PMD definitions

800ZR: 800 Gigabit Zero-chirp Range coherent standard for DCI applications

800G-LR: Single-wavelength coherent for campus applications up to 10km

1600ZR: Recently initiated in OIF for 1.6 Terabit coherent applications

Channel Spacing Evolution:

• Class 2 (400G): 75 GHz spacing
• Class 3 (800G): 150 GHz spacing
• Class 4 (1.6T): 300 GHz spacing

Modulation Schemes:

• 800G: QPSK (800G), 16QAM (1.2T), 64QAM (1.8T)
• 1.6T: QPSK (1.6T), 16QAM (3.2T), 64QAM (4.8T)

Description: Industry consortium specification that preceded IEEE 802.3df, based on dual instance of 400 GbE PCS/FEC

Role: Enabled early 800G product development while IEEE standard was in progress

Status: Served as industry template, now superseded by IEEE 802.3df

Transceiver evolution is driven by ASIC capabilities and roadmaps:

Key Trend: 320x increase in switching bandwidth over 16 years (2010-2026)

Why Higher Speeds Matter for Efficiency

Moving to higher port speeds dramatically improves energy efficiency:

Example: 25.6T Network Capacity

Artificial Intelligence and Machine Learning workloads are driving unprecedented demands on optical interconnects:

Key Requirements

• Ultra-High Bandwidth: GPU-to-GPU communication requires massive bandwidth (800G, 1.6T per link)
• Low Latency: Training clusters need minimal signal propagation delay
• Power Efficiency: AI infrastructure already consumes significant power; interconnect must minimize overhead
• Scalability: Clusters scale to thousands of GPUs requiring non-blocking fabrics

Technology Responses

• LPO for Power: Reduces interconnect power by 50%+ for intra-cluster connections
• CPO for Density: Enables port counts matching ASIC I/O capabilities
• Advanced Cooling: Liquid cooling becoming standard for AI switches
• 800G/1.6T Deployment: Accelerated timeline compared to traditional data center adoption

Market Impact: AI networking is dominating future design models for data centers, with AI requirements driving faster adoption cycles for new transceiver technologies.

The optical transceiver industry has evolved through several generations:

Short Term (2024-2026)

• Volume deployment of 800G in hyperscale data centers
• LPO adoption for AI clusters and short-reach applications
• QSFP-DD1600 sampling and early deployment
• IEEE 802.3dj standard completion
• 800ZR coherent optics maturation

Medium Term (2026-2028)

• 1.6T Ethernet mainstream adoption in hyperscale
• CPO demonstrations and limited deployment
• 1600ZR coherent standards and products
• 200 Gbps per lane electrical interfaces becoming standard
• Advanced modulation (PAM6, PAM8) exploration

Long Term (2028+)

• 3.2T and beyond exploration (400G per lane?)
• Widespread CPO adoption in spine switches
• Novel architectures (photonic switching, optical computing integration)
• Quantum networking interfaces (potentially new form factors)
• Continued consolidation around QSFP-DD and OSFP families with multi-terabit capabilities

Coherent Optics Shift to Pluggables

The coherent optics market has undergone a dramatic shift:

• Historical: Embedded coherent modules dominated (line cards with integrated optics)
• CFP2 Era: First pluggable coherent, but remained minority
• 400G Revolution: 400ZR pluggables "flipped the script" - now 70% of coherent deployments
• Drivers: Router form factor support (QSFP-DD), interoperability, reduced performance gap
• Future: Embedded designs will benefit from alignment with pluggable standards

Form Factor Market Leadership

QSFP-DD Dominance: Leading market adoption for 400G and positioned to continue for 800G and 1.6T due to:

• Backward compatibility with entire QSFP family
• Riding heatsink thermal advantages
• Small faceplate enabling highest density
• Strong ecosystem support

OSFP Growth: Gaining adoption in applications requiring:

• Highest power handling (>15W coherent modules)
• Maximum thermal headroom
• Specific system architectures optimized for OSFP dimensions

Common Abbreviations Not Covered Above